BCM1101 - Enterprise IP Phone Chip

Enterprise IP Phone Chip

The Broadcom BCM1101 represents a new level of integration for enterprise Ethernet IP phone and small gateway applications.

Key modules integrated in the BCM1101 include:

  • MIPS32 150-MHz processor with 8K 2-way set associative I-cache and a 4K 2-way associative D-cache. This MCU supports the VoIP protocol stacks, jitter buffer management, and application program. Programming is done in C, on top of Broadcom's object-oriented signal processing API
  • ZSP 140-MHz DSP with 48 KB of instruction and 32 KB of data RAM. The DSP supports a wide range of vocoders, acoustic echo cancellation for full-duplex speakerphone, fax modems, and a variety of telephony algorithms (e.g., DTMF and call progress tones)
  • Analog codecs. Three ADCs and DACs are integrated, eliminating the need for an analog switch to allow the sharing of a codec between multiple interfaces
  • 10/100BASE-T Ethernet switch, media access controllers, and transceivers. The three-port Ethernet switch integrates three full-duplex capable media access controllers (MACs), serial management port, an address resolution engine, a non-blocking switch controller, 64 KB of internal switch memory, 802.1p prioritization for voice packets, 802.1Q VLAN tagging support for segmenting physical networks into multiple logical networks, and a set of management information base (MIB) statistics registers. The two transceivers perform all of the functions for 100BASE-T Ethernet in full- or half-duplex mode over Category (CAT) twisted pair cable and 10BASE-T Ethernet in full- or half-duplex mode over CAT 3, 4, or 5 twisted pair cable. The transceivers integrate support for in-line powering over Ethernet and support auto-MDI/MDIX detection to allow the use of any cable type in either port.

  • The most highly integrated silicon solution for Voice over IP enterprise phone and Ethernet residential gateway applications
  • 150-MHz MIPS32 CPU (110 DMIPS) with 8K I-cache and 4K D-cache
  • Superscalar 140 MHz ZSP DSP with dual-MAC (280 MIPS), 48 KB of instruction and 32KB of data RAM